Etch process for improving yield of dielectric contacts on nickel silicides

ABSTRACT

The embodiments of the invention generally relate to an etching process, and more particularly to an etch processing for improving the yield of dielectric contacts on nickel silicides. An oxygen-free feedgas is used in an etching process to reduce or eliminate residuals, including oxidation and consumption of the silicide layer, at the contact surface. The contact resistance at contact surface is reduced, thereby improving the performance of the device

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is a divisional application of U.S. applicationSer. No. 10/906,112, filed on Feb. 3, 2005, the contents of which areincorporated herein by reference in their entirety.

FIELD OF THE INVENTION

The embodiments of the invention generally relate to an etching process,and more particularly to an etch processing for improving the yield ofdielectric contacts on nickel silicides.

BACKGROUND OF THE INVENTION

Patterning of insulators in modern semiconductor technology, especiallyfor so-called “middle of the line” or MOL levels, may require the use ofbarrier or “stop” layers because of the presence of underlyingtopography. The barrier layer is substantially different than theisolation dielectric material above it, and therefore, by design,requires a separate etching step in the patterning process which hasselectivity to the underlying materials.

One such MOL level requires that the barrier, typically silicon nitride,be etched over a silicide. It may be desirable for device performancereasons for the silicide layer to be made of a nickel silicide (NiSi),as opposed to a cobalt silicide (CoSi). These materials have differentphysical and chemical properties and the etching chemistry for thebarrier layer must be chosen properly to avoid consuming excessiveamounts of the silicide during the process. Also, the amount ofresiduals left behind and the surface damage must be minimized, so thatthe surface of the underlying silicide is suitable for furtherprocessing.

Conventional barrier etch processes have been shown to consume too muchof the NiSi and deposit excessive amounts of polymer, especially ondevices such as arsenic doped n-FETs. In order to prevent excessivedeposition of polymer and consequent etch stop, an oxygen feedgas isadded to the barrier etch chemistry. Although the use of oxygen isadequate for cobalt based silicides, a thick residual film are oftenformed in the contacts when the oxygen feedgas is used with nickelsilicides. These residuals are resistant to standard dry clean stepsused in plasma etching (e.g., oxygen), and are less prevalent in toolingwith an inherently lower self-bias voltage. These residuals may beformed by carbonyls of nickel and subsequent delamination into thecontact. The exact mechanism is not clearly understood, nor is thereason why n-FETs, especially arsenic doped n-FETs, are most likelyaffected.

MOL contact etch typically requires a high self-bias process for theoxide step for both profile control and throughput. One possiblesolution to the formation of residuals has been to run the barrier etchin a different tool. This solution is designed to etch the barrier layerbut is often not well suited to etching the thick isolation dielectric.For example, for silicon nitride, a spacer type etch tool may be used,which has a very low inherent self-bias, and therefore allows higherinherent selectivity to silicides than that possible on a standard oxideetch tool. If no Ni is eroded, then the postulated Ni carbonyl formationcannot occur. However, this de-integrated approach increases the cycletime of the MOL etch, produces an increased risk of defects, andrequires additional tooling.

SUMMARY OF THE INVENTION

In view of the foregoing, an exemplary embodiment of the inventionprovides a method for etching a semiconductor wafer comprising the stepsof forming a substrate, forming a silicide layer on the substrate,forming an insulation layer on the silicide layer, forming anoxygen-free feed gas, and etching the insulation layer to expose atleast one portion of the silicide layer.

A further exemplary embodiment of the invention provides a method foretching a semiconductor wafer includes the steps of forming a substrate,forming a silicide layer on the substrate, and forming a dielectriclayer on the silicide layer. The method further includes forming a feedgas, where the feed gas consists essentially of nitrogen, etching thedielectric layer to expose at least one portion of the silicide layerand forming a contact material on the dielectric material such that thecontact material contacts at least one exposed portion of the silicidelayer.

A further exemplary embodiment of the invention provides a semiconductorwafer including a substrate, and a silicide layer on the substrate. Thesemiconductor wafer further includes an insulation material on thesilicide layer having exposed portions to the silicide layer wherein theexposed portions are etched using an oxygen-free feed gas and aresubstantially free of a residual layer, and a contact material layer onthe insulation material such that the contact material layer is incontact at least one exposed portion of the silicide layer.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features and advantages of the invention will becomemore apparent to those of ordinary skill in the art by describing indetail exemplary embodiments thereof with reference to the attacheddrawings.

FIG. 1 is a flowchart illustrating a method for etching a semiconductorwafer according to an embodiment of the invention;

FIG. 2 is a cross-section representation of a semiconductor wafer etchedaccording to an embodiment of the invention;

FIG. 3A is a cross-sectional SEM image of a semiconductor wafer etchedthrough a conventional process; and

FIG. 3B is a cross-sectional SEM image of two semiconductor wafersetched through a process of an embodiment of the invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

The embodiments of the invention and the various features andadvantageous details thereof are explained more fully with reference tothe non-limiting embodiments that are illustrated in the accompanyingdrawings and detailed in the following description. It should be notedthat the features illustrated in the drawings are not necessarily drawnto scale. Descriptions of well-known components and processingtechniques are omitted so as to not unnecessarily obscure theembodiments of the invention. The examples used herein are intendedmerely to facilitate an understanding of ways in which the embodimentsof the invention may be practiced and to further enable those of skillin the art to practice the embodiments of the invention. Accordingly,the examples should not be construed as limiting the scope of theembodiments of the invention.

According to an embodiment of the invention, a nitride etch chemistry isbased on nitrogen addition, rather than oxygen, with improvedselectivity to nickel silicide and substantial mitigation of residualson the nickel silicide. This replacement may prevent the carbonylformation of Ni, and hence any residuals. In particular, even withmoderate consumption of the nickel silicide in this novel chemistry,there is significant formation of residuals is reduced or eliminated,allowing the use of the oxide etch tool and subsequent integration ofthe etch process without opens.

FIG. 1 is a flowchart illustrating a process for etching a semiconductorwafer according to an embodiment of the invention. At step 110, asubstrate is provided. At step 120, a silicide layer is provided, and atstep 130, an insulation layer is provided. According to an embodiment ofthe invention, the silicide layer may be a metal silicide, such asnickel silicide. According to a further embodiment of the invention, theinsulation layer may comprise a dielectric material, such as siliconnitride, silicon dioxide, silicon oxynitride, silicon carbide, or otherdielectric film.

At step 140, an oxygen-free feedgas is provided, and etching of theinsulation layer occurs at step 150. According to an embodiment of theinvention, the oxygen-free feedgas consists substantially of nitrogen.The etching is performed, with the oxygen-free feedgas, such that thesilicide layer is exposed, but that consumption of the silicide layer isreduced or eliminated. Contact material is provided at step 160. Thecontact material may provide an electrical connection to the silicidelayer. According to an embodiment of the invention, the various layersmay be provided directly on a subsequent layer. For example, thesilicide layer may be provided directly on the substrate. However, it isunderstood that one or more other materials may be placed in between thesubstrate and the silicide layer.

Typical etch chemistries contain CF₄, CH₂F₂, Ar and O₂, though othersmay be used to achieve better selectivity to the insulator. As describedabove, the presence of oxygen gas (O₂) in the feedgas of this processallows for the production of carbonyl groups (C-0) which are known tocreate volatile nickel carbonyls (Ni(CO)₄). By elimination of the O₂from the feedgas, thereby providing an oxygen-free feedgas, the pathwayfor the chemical attack of the nickel silicide (NiSi) by this mechanismmay be reduced or eliminated. In addition, other gases having oxygen,(i.e., carbon dioxide (C O₂, etc.) may be eliminated to remove sourcesof oxygen. This may also be referred to as an atomic oxygen free feedgas. According to an embodiment of the invention, other oxygen sourcesmay be found in the etching chamber, either from parts of the tool orfrom the insulator itself. However, these oxygen sources may be of amuch smaller degree than direct injection in the feedgas.

FIG. 2 is a cross-section representation of a semi-conductor waferetched according to an embodiment of the present invention. A silicidelayer 210 is located on a substrate 200. An insulation layer 220 islocated on the silicide layer 210. As illustrated, the insulation layerhas been etched to the silicide layer 220 to form contact surfaces 240.According to an embodiment of the invention, the insulation layer 220 isetched to the silicide layer 210 to from the contact surfaces, but theetching reduces or eliminates the consumption of the silicide. Further,oxidation is reduced or eliminated at the contact surfaces 240.

A first contact material 230A, a second contact material 230B, and athird contact material 230C are shown provided in the areas etched inthe insulation layer 220. The first contact material 230A, a secondcontact material 230B, and a third contact material 230C comprise anelectrically conductive material that provides an electrical contactwith the silicide layer 210 at the respective contact surface 240. Whilethe first contact material 230A, the second contact material 230B, andthe third contact material 230C have been illustrated in FIG. 2 as beingseparate, distinct and not connected, it is understood that the samecontact material can be provided to connect two or more contact surfaces240 of the silicide layer 210. The first contact material 230A, thesecond contact material 230B, and the third contact material 230C may beany type of contact material, such as, for example, copper.

FIG. 3A is a cross-sectional image of a semiconductor wafer etchedthrough a conventional process and FIG. 3B is a cross-sectional SEMimage of two semiconductor wafers etched through a process of anembodiment of the invention. The difference between these figures showsthe results of the substitution of an oxygen-free feedgas as describedabove.

As illustrated in FIG. 3A, a dielectric 320 is etched to the silicidelayer 310. A contact surface 340 of the silicide layer 310 has residuals345 in the etched portion of the dielectric layer 320. The residuals 345may be oxidation and/or the results of consumption of the silicide layer310. Using conventional processes, the metal in the silicide isoxidized. The silicide, which may contain nickel or other metal, mayalso be consumed. The resulting oxide layer blocks conductivity.

FIG. 3B also illustrates a dielectric 320 etched to the silicide layer310. However, at a contact surface 340 of the silicide layer 310, thereare little or no residuals 345 in the etched portion of the dielectriclayer 320. Thus, the contact surface 340 of the silicide layer 310 has abetter electrical connection for a contact material (not shown) thatwill be provide on the dielectric layer 320. This is provided by usingthe oxygen-free feed gas since the residuals, which may includeoxidation and/or the consumption of the silicide layer, may be reducedor eliminated.

According to an embodiment of the invention, manufacturing asemiconductor device includes etching a dielectric material and stoppingat a conducting layer, such as a silicide-type layer, which may includesome sort of metal layer. These processes use different feed gases in ahigh energy environment to etch away the dielectric layer and stop onthe silicide layer. It is desirable to stop on the layer withoutdamaging the layer or removing any portion of the layer. Typicalconventional type processes or chemistries often result in an oxidationon the silicate layer, as well damage induced. By using an oxygen-freefeed gas, such as hydrogen or nitrogen, damage and/or oxidation may bereduced or eliminated in the silicide layer. According to an embodimentof the invention, a hydrogen-based feed gas may range from about 0% toabout 80% hydrogen by volume, and more specifically about 5% to about15% hydrogen and more by volume. The remaining volume may include othergases, such as argon or fluorocarbons. According to another embodimentof the invention, a nitrogen-based feed gas may range from about 0% toabout 80% nitrogen by volume, and more specifically, about 25% to about45% nitrogen by volume. The remaining volume may include other gases,such as argon or fluorocarbons.

According to an embodiment of the invention, an oxygen-free feedgas isprovided for the etching process. The feedgas may consist substantiallyof nitrogen. Alternatively, the feedgas may comprise a hydrogen-basedfeedgas. Other oxygen-free feedgases may also be used.

The use of the oxygen-free feedgas according to an embodiment of theinvention improves the self-bias on the semiconductor wafer during theplasma etching process. According to an embodiment of the invention, theetching tool may result in a self-bias to the wafer of greater thanabout 50 volts, and, more particularly, in a self-bias to the wafer ofgreater than about 300 volts.

While the invention has been described in terms of exemplaryembodiments, those skilled in the art will recognize that the inventioncan be practiced with modifications and in the spirit and scope of theappended claims.

1. A semiconductor wafer, comprising: a substrate; a silicide layer onthe substrate; an insulation material on the silicide layer havingexposed portions to the silicide layer wherein the exposed portions areetched using an oxygen-free feed gas and are substantially free of aresidual layer; and a contact material layer on the insulation materialsuch that the contact material layer is in contact at least one exposedportion of the silicide layer.
 2. The semiconductor wafer of claim 1,further comprising providing a second contact material layer on theinsulation layer such that the second contact material layer is incontact with at least another of the exposed portions of the silicide.3. The semiconductor wafer of claim 1, where the silicide layercomprises nickel silicide.
 4. The semiconductor wafer of claim 1,wherein the dielectric material comprises silicon nitride.
 5. Thesemiconductor wafer of claim 1, wherein the oxygen-free feed gasconsists essentially of nitrogen.
 6. The semiconductor wafer of claim 3,wherein a portion of the nickel silicide layer is exposed through theinsulation and the contact material layer on the insulating materialcontacts the exposed portion of the nickel silicide layer.
 7. Thesemiconductor wafer of claim 1, wherein the feed gas comprises nitrogenin a range of about 0% to about 80% by volume.
 8. The semiconductorwafer of claim 1, wherein the feed gas comprises nitrogen in a range ofabout 25% to about 45% by volume.
 9. The semiconductor wafer of claim 1,wherein the feed gas comprises hydrogen in a range of about 0% to about80% by volume.
 10. The semiconductor wafer of claim 1, wherein the feedgas comprises hydrogen in a range of about 5% to about 15% by volume.